Commit 65d6bcc8d3e0e70e6596c37dbbf4f6f4f1cdd525

Authored by Antonio Carlos Domínguez Brito
1 parent 7aa96410
Exists in master

a possible small bug has been fixed in set_tx_data()

examples/soft_uart_serial_test/soft_uart_serial_test.ino
... ... @@ -141,7 +141,6 @@ void loop() {
141 141 Serial.print(static_cast<int>(serial_obj.get_timer()));
142 142 Serial.print("] sending: "); Serial.println(counter);
143 143 serial_obj.println(counter);
144   - serial_obj.println(counter);
145 144  
146 145 Serial.print("<-- [Serial2] received: ");
147 146 int data=0;
... ...
fifo.h
... ... @@ -56,14 +56,14 @@ namespace arduino_due
56 56  
57 57 bool pop(T& t)
58 58 {
59   - if(_first_<0) return false;
  59 + if(_first_<0) return false;
60 60  
61   - t=_buffer_p_[_first_];
  61 + t=_buffer_p_[_first_];
62 62  
63   - if(_first_==_last_) _init_();
64   - else { _first_=(_first_+1)%LENGTH; _items_--; }
  63 + if(_first_==_last_) _init_();
  64 + else { _first_=(_first_+1)%LENGTH; _items_--; }
65 65  
66   - return true;
  66 + return true;
67 67 }
68 68  
69 69 bool is_empty() { return (_first_<0); }
... ... @@ -83,44 +83,44 @@ namespace arduino_due
83 83 // when is full, we can not push any further element
84 84 bool _push_(const T& t,bool_to_type<false>)
85 85 {
86   - int new_last=(_last_+1)%LENGTH;
  86 + int new_last=(_last_+1)%LENGTH;
87 87  
88   - if(new_last==_first_) // full?
89   - return false;
  88 + if(new_last==_first_) // full?
  89 + return false;
90 90  
91   - _last_=new_last;
92   - _buffer_p_[_last_]=t;
  91 + _last_=new_last;
  92 + _buffer_p_[_last_]=t;
93 93  
94   - if(_first_<0) _first_=_last_;
  94 + if(_first_<0) _first_=_last_;
95 95  
96   - _items_++;
  96 + _items_++;
97 97  
98   - return true;
  98 + return true;
99 99 }
100 100  
101 101 // push implementation for a circular fifo
102 102 // when is full, we overwrite the first element
103 103 bool _push_(const T& t,bool_to_type<true>)
104 104 {
105   - int new_last=(_last_+1)%LENGTH;
  105 + int new_last=(_last_+1)%LENGTH;
106 106  
107   - if(new_last==_first_) // full?
108   - {
109   - // NOTE: when the fifo is circular and the fifo is full
110   - // the new element overwrites the first one
111   - _first_=(_first_+1)%LENGTH;
112   - _last_=new_last; _buffer_p_[_last_]=t;
113   - return false;
114   - }
  107 + if(new_last==_first_) // full?
  108 + {
  109 + // NOTE: when the fifo is circular and the fifo is full
  110 + // the new element overwrites the first one
  111 + _first_=(_first_+1)%LENGTH;
  112 + _last_=new_last; _buffer_p_[_last_]=t;
  113 + return false;
  114 + }
115 115  
116   - _last_=new_last;
117   - _buffer_p_[_last_]=t;
  116 + _last_=new_last;
  117 + _buffer_p_[_last_]=t;
118 118  
119   - if(_first_<0) _first_=_last_;
  119 + if(_first_<0) _first_=_last_;
120 120  
121   - _items_++;
  121 + _items_++;
122 122  
123   - return true;
  123 + return true;
124 124 }
125 125 };
126 126  
... ...
soft_uart.h
... ... @@ -215,435 +215,435 @@ namespace arduino_due
215 215  
216 216 uart() { _mode_=mode_codes::INVALID_MODE; }
217 217  
218   - ~uart() { end(); }
  218 + ~uart() { end(); }
219 219  
220 220 uart(const uart&) = delete;
221 221 uart(uart&&) = delete;
222   - uart& operator=(const uart&) = delete;
223   - uart& operator=(uart&&) = delete;
224   -
225   - return_codes config(
226   - uint32_t rx_pin = default_pins::DEFAULT_RX_PIN,
227   - uint32_t tx_pin = default_pins::DEFAULT_TX_PIN,
228   - uint32_t bit_rate = bit_rates::DEFAULT_BIT_RATE,
229   - data_bit_codes the_data_bits = data_bit_codes::EIGHT_BITS,
230   - parity_codes the_parity = parity_codes::EVEN_PARITY,
231   - stop_bit_codes the_stop_bits = stop_bit_codes::ONE_STOP_BIT
232   - )
233   - {
234   - _mode_=mode_codes::INVALID_MODE;
235   -
236   - if(rx_pin>=NUM_DIGITAL_PINS)
237   - return return_codes::BAD_RX_PIN;
238   -
239   - if(tx_pin>=NUM_DIGITAL_PINS)
240   - return return_codes::BAD_TX_PIN;
241   -
242   - return_codes ret_code=
243   - _ctx_.config(
244   - rx_pin,
245   - tx_pin,
246   - bit_rate,
247   - the_data_bits,
248   - the_parity,
249   - the_stop_bits
250   - );
251   -
252   - if(ret_code!=return_codes::EVERYTHING_OK) return ret_code;
253   -
254   - // cofigure tx pin
255   - pinMode(tx_pin,OUTPUT);
256   - digitalWrite(tx_pin,HIGH);
257   -
258   - // configure & attatch interrupt on rx pin
259   - pinMode(rx_pin,INPUT_PULLUP);
260   - attachInterrupt(rx_pin,uart::rx_interrupt,CHANGE);
261   -
262   - _ctx_.enable_rx_interrupts();
263   - _mode_=mode_codes::FULL_DUPLEX;
264   -
265   - return return_codes::EVERYTHING_OK;
266   - }
  222 + uart& operator=(const uart&) = delete;
  223 + uart& operator=(uart&&) = delete;
  224 +
  225 + return_codes config(
  226 + uint32_t rx_pin = default_pins::DEFAULT_RX_PIN,
  227 + uint32_t tx_pin = default_pins::DEFAULT_TX_PIN,
  228 + uint32_t bit_rate = bit_rates::DEFAULT_BIT_RATE,
  229 + data_bit_codes the_data_bits = data_bit_codes::EIGHT_BITS,
  230 + parity_codes the_parity = parity_codes::EVEN_PARITY,
  231 + stop_bit_codes the_stop_bits = stop_bit_codes::ONE_STOP_BIT
  232 + )
  233 + {
  234 + _mode_=mode_codes::INVALID_MODE;
  235 +
  236 + if(rx_pin>=NUM_DIGITAL_PINS)
  237 + return return_codes::BAD_RX_PIN;
  238 +
  239 + if(tx_pin>=NUM_DIGITAL_PINS)
  240 + return return_codes::BAD_TX_PIN;
  241 +
  242 + return_codes ret_code=
  243 + _ctx_.config(
  244 + rx_pin,
  245 + tx_pin,
  246 + bit_rate,
  247 + the_data_bits,
  248 + the_parity,
  249 + the_stop_bits
  250 + );
  251 +
  252 + if(ret_code!=return_codes::EVERYTHING_OK) return ret_code;
  253 +
  254 + // cofigure tx pin
  255 + pinMode(tx_pin,OUTPUT);
  256 + digitalWrite(tx_pin,HIGH);
  257 +
  258 + // configure & attatch interrupt on rx pin
  259 + pinMode(rx_pin,INPUT_PULLUP);
  260 + attachInterrupt(rx_pin,uart::rx_interrupt,CHANGE);
  261 +
  262 + _ctx_.enable_rx_interrupts();
  263 + _mode_=mode_codes::FULL_DUPLEX;
  264 +
  265 + return return_codes::EVERYTHING_OK;
  266 + }
267 267  
268 268 return_codes half_duplex_config(
269   - uint32_t rx_tx_pin = default_pins::DEFAULT_RX_PIN,
270   - uint32_t bit_rate = bit_rates::DEFAULT_BIT_RATE,
271   - data_bit_codes the_data_bits = data_bit_codes::EIGHT_BITS,
272   - parity_codes the_parity = parity_codes::EVEN_PARITY,
273   - stop_bit_codes the_stop_bits = stop_bit_codes::ONE_STOP_BIT,
274   - bool in_rx_mode = true
275   - )
276   - {
277   - _mode_=mode_codes::INVALID_MODE;
278   -
279   - if(rx_tx_pin>=NUM_DIGITAL_PINS)
280   - return return_codes::BAD_HALF_DUPLEX_PIN;
281   -
282   - return_codes ret_code=
283   - _ctx_.config(
284   - rx_tx_pin,
285   - rx_tx_pin,
286   - bit_rate,
287   - the_data_bits,
288   - the_parity,
289   - the_stop_bits
290   - );
291   -
292   - if(ret_code!=return_codes::EVERYTHING_OK) return ret_code;
293   -
294   - if(in_rx_mode)
295   - {
296   - // configure & attatch interrupt on rx pin
297   - pinMode(rx_tx_pin,INPUT_PULLUP);
298   - attachInterrupt(rx_tx_pin,uart::rx_interrupt,CHANGE);
299   - _ctx_.enable_rx_interrupts();
300   - _mode_=mode_codes::RX_MODE;
301   - }
302   - else
303   - {
304   - // cofigure tx pin
305   - pinMode(rx_tx_pin,OUTPUT);
306   - digitalWrite(rx_tx_pin,HIGH);
307   - _mode_=mode_codes::TX_MODE;
308   - }
309   -
310   - return return_codes::EVERYTHING_OK;
311   - }
312   -
313   - mode_codes get_mode() { return _mode_; }
  269 + uint32_t rx_tx_pin = default_pins::DEFAULT_RX_PIN,
  270 + uint32_t bit_rate = bit_rates::DEFAULT_BIT_RATE,
  271 + data_bit_codes the_data_bits = data_bit_codes::EIGHT_BITS,
  272 + parity_codes the_parity = parity_codes::EVEN_PARITY,
  273 + stop_bit_codes the_stop_bits = stop_bit_codes::ONE_STOP_BIT,
  274 + bool in_rx_mode = true
  275 + )
  276 + {
  277 + _mode_=mode_codes::INVALID_MODE;
  278 +
  279 + if(rx_tx_pin>=NUM_DIGITAL_PINS)
  280 + return return_codes::BAD_HALF_DUPLEX_PIN;
  281 +
  282 + return_codes ret_code=
  283 + _ctx_.config(
  284 + rx_tx_pin,
  285 + rx_tx_pin,
  286 + bit_rate,
  287 + the_data_bits,
  288 + the_parity,
  289 + the_stop_bits
  290 + );
  291 +
  292 + if(ret_code!=return_codes::EVERYTHING_OK) return ret_code;
  293 +
  294 + if(in_rx_mode)
  295 + {
  296 + // configure & attatch interrupt on rx pin
  297 + pinMode(rx_tx_pin,INPUT_PULLUP);
  298 + attachInterrupt(rx_tx_pin,uart::rx_interrupt,CHANGE);
  299 + _ctx_.enable_rx_interrupts();
  300 + _mode_=mode_codes::RX_MODE;
  301 + }
  302 + else
  303 + {
  304 + // cofigure tx pin
  305 + pinMode(rx_tx_pin,OUTPUT);
  306 + digitalWrite(rx_tx_pin,HIGH);
  307 + _mode_=mode_codes::TX_MODE;
  308 + }
  309 +
  310 + return return_codes::EVERYTHING_OK;
  311 + }
  312 +
  313 + mode_codes get_mode() { return _mode_; }
314 314  
315 315 bool set_rx_mode()
316   - {
317   - if(
318   - (_mode_==mode_codes::INVALID_MODE) ||
319   - (_mode_==mode_codes::FULL_DUPLEX)
320   - ) return false;
  316 + {
  317 + if(
  318 + (_mode_==mode_codes::INVALID_MODE) ||
  319 + (_mode_==mode_codes::FULL_DUPLEX)
  320 + ) return false;
321 321  
322   - if(_mode_==mode_codes::RX_MODE) return true;
323   - flush();
  322 + if(_mode_==mode_codes::RX_MODE) return true;
  323 + flush();
324 324  
325   - pinMode(_ctx_.rx_pin,INPUT_PULLUP);
326   - attachInterrupt(_ctx_.rx_pin,uart::rx_interrupt,CHANGE);
327   -
328   - _mode_=mode_codes::RX_MODE;
329   - _ctx_.enable_rx_interrupts();
330   - return true;
331   - }
  325 + pinMode(_ctx_.rx_pin,INPUT_PULLUP);
  326 + attachInterrupt(_ctx_.rx_pin,uart::rx_interrupt,CHANGE);
  327 +
  328 + _mode_=mode_codes::RX_MODE;
  329 + _ctx_.enable_rx_interrupts();
  330 + return true;
  331 + }
332 332  
333   - bool set_tx_mode()
334   - {
335   - if(
336   - (_mode_==mode_codes::INVALID_MODE) ||
337   - (_mode_==mode_codes::FULL_DUPLEX)
338   - ) return false;
  333 + bool set_tx_mode()
  334 + {
  335 + if(
  336 + (_mode_==mode_codes::INVALID_MODE) ||
  337 + (_mode_==mode_codes::FULL_DUPLEX)
  338 + ) return false;
339 339  
340   - if(_mode_==mode_codes::TX_MODE) return true;
  340 + if(_mode_==mode_codes::TX_MODE) return true;
341 341  
342   - while(true)
343   - {
344   - _ctx_.disable_rx_interrupts();
345   - if(_ctx_.rx_status==rx_status_codes::LISTENING) break;
346   - _ctx_.enable_rx_interrupts();
347   - }
  342 + while(true)
  343 + {
  344 + _ctx_.disable_rx_interrupts();
  345 + if(_ctx_.rx_status==rx_status_codes::LISTENING) break;
  346 + _ctx_.enable_rx_interrupts();
  347 + }
348 348  
349   - detachInterrupt(_ctx_.rx_pin);
350   - pinMode(_ctx_.tx_pin,OUTPUT);
351   - digitalWrite(_ctx_.tx_pin,HIGH);
  349 + detachInterrupt(_ctx_.rx_pin);
  350 + pinMode(_ctx_.tx_pin,OUTPUT);
  351 + digitalWrite(_ctx_.tx_pin,HIGH);
352 352  
353   - _mode_=mode_codes::TX_MODE;
354   - return true;
355   - }
  353 + _mode_=mode_codes::TX_MODE;
  354 + return true;
  355 + }
356 356  
357   - void end() { _ctx_.end(); }
  357 + void end() { _ctx_.end(); }
358 358  
359   - int available() { return _ctx_.available(); }
  359 + int available() { return _ctx_.available(); }
360 360  
361   - static void tc_interrupt(uint32_t the_status)
362   - { _ctx_.tc_interrupt(the_status); }
  361 + static void tc_interrupt(uint32_t the_status)
  362 + { _ctx_.tc_interrupt(the_status); }
363 363  
364   - static void rx_interrupt() { _ctx_.rx_interrupt(); }
  364 + static void rx_interrupt() { _ctx_.rx_interrupt(); }
365 365  
366 366 timer_ids get_timer() { return TIMER; }
367 367  
368   - size_t get_rx_buffer_length() { return RX_BUFFER_LENGTH; }
369   - size_t get_tx_buffer_length() { return TX_BUFFER_LENGTH; }
  368 + size_t get_rx_buffer_length() { return RX_BUFFER_LENGTH; }
  369 + size_t get_tx_buffer_length() { return TX_BUFFER_LENGTH; }
370 370  
371 371 uint32_t get_bit_rate() { return _ctx_.bit_rate; }
372 372 double get_bit_time() { return _ctx_.bit_time; }
373 373 double get_frame_time() { return _ctx_.frame_time; }
374 374  
375   - uint32_t get_rx_data(uint32_t& data)
376   - {
377   - return (
378   - (
379   - (_mode_==mode_codes::FULL_DUPLEX) ||
380   - (_mode_==mode_codes::RX_MODE)
381   - )?
382   - _ctx_.get_rx_data(data):
383   - rx_data_status_codes::NO_DATA_AVAILABLE
384   - );
385   - }
386   -
387   - bool data_available(uint32_t status)
388   - { return _ctx_.data_available(status); }
389   -
390   - bool data_lost(uint32_t status)
391   - { return _ctx_.data_lost(status); }
392   -
393   - bool bad_status(uint32_t status)
394   - { return _ctx_.bad_status(status); }
395   -
396   - bool bad_start_bit(uint32_t status)
397   - { return _ctx_.bad_start_bit(status); }
398   -
399   - bool bad_parity(uint32_t status)
400   - { return _ctx_.bad_parity(status); }
401   -
402   - bool bad_stop_bit(uint32_t status)
403   - { return _ctx_.bad_stop_bit(status); }
  375 + uint32_t get_rx_data(uint32_t& data)
  376 + {
  377 + return (
  378 + (
  379 + (_mode_==mode_codes::FULL_DUPLEX) ||
  380 + (_mode_==mode_codes::RX_MODE)
  381 + )?
  382 + _ctx_.get_rx_data(data):
  383 + rx_data_status_codes::NO_DATA_AVAILABLE
  384 + );
  385 + }
404 386  
405   - // NOTE: data is 5, 6, 7, 8 or 9 bits length
406   - bool set_tx_data(uint32_t data)
407   - {
408   - return (
409   - (
410   - (_mode_==mode_codes::FULL_DUPLEX) ||
411   - (_mode_==mode_codes::TX_MODE)
412   - )? _ctx_.set_tx_data(data): false
413   - );
414   - }
  387 + bool data_available(uint32_t status)
  388 + { return _ctx_.data_available(status); }
  389 +
  390 + bool data_lost(uint32_t status)
  391 + { return _ctx_.data_lost(status); }
  392 +
  393 + bool bad_status(uint32_t status)
  394 + { return _ctx_.bad_status(status); }
  395 +
  396 + bool bad_start_bit(uint32_t status)
  397 + { return _ctx_.bad_start_bit(status); }
  398 +
  399 + bool bad_parity(uint32_t status)
  400 + { return _ctx_.bad_parity(status); }
  401 +
  402 + bool bad_stop_bit(uint32_t status)
  403 + { return _ctx_.bad_stop_bit(status); }
  404 +
  405 + // NOTE: data is 5, 6, 7, 8 or 9 bits length
  406 + bool set_tx_data(uint32_t data)
  407 + {
  408 + return (
  409 + (
  410 + (_mode_==mode_codes::FULL_DUPLEX) ||
  411 + (_mode_==mode_codes::TX_MODE)
  412 + )? _ctx_.set_tx_data(data): false
  413 + );
  414 + }
415 415  
416   - tx_status_codes get_tx_status() { return _ctx_.get_tx_status(); }
417   - void flush() { _ctx_.flush(); }
  416 + tx_status_codes get_tx_status() { return _ctx_.get_tx_status(); }
  417 + void flush() { _ctx_.flush(); }
418 418  
419   - void flush_rx() { _ctx_.flush_rx(); }
  419 + void flush_rx() { _ctx_.flush_rx(); }
420 420  
421 421 private:
422 422  
423   - struct _uart_ctx_
424   - {
425   -
426   - return_codes config(
427   - uint32_t the_rx_pin,
428   - uint32_t the_tx_pin,
429   - uint32_t the_bit_rate,
430   - data_bit_codes the_data_bits,
431   - parity_codes the_parity,
432   - stop_bit_codes the_stop_bits
433   - );
434   -
435   - void end()
436   - {
437   - flush();
438   -
439   - disable_tc_interrupts(); disable_rx_interrupts();
440   -
441   - stop_tc_interrupts(); detachInterrupt(rx_pin);
442   -
443   - pmc_disable_periph_clk(uint32_t(timer_p->irq));
444   - }
445   -
446   - void tc_interrupt(uint32_t the_status);
447   - void rx_interrupt();
448   -
449   - uint32_t get_rx_data(uint32_t& data);
450   -
451   - int available()
452   - {
453   - register int any;
454   - disable_tc_interrupts();
455   - any=rx_buffer.items();
456   - enable_tc_interrupts();
457   -
458   - return any;
459   - }
460   -
461   - bool data_available(uint32_t status)
462   - {
463   - return (
464   - status&(
465   - rx_data_status_codes::DATA_AVAILABLE|
466   - rx_data_status_codes::DATA_LOST
467   - )
468   - );
469   - }
470   -
471   - bool data_lost(uint32_t status)
472   - { return (status&rx_data_status_codes::DATA_LOST); }
473   -
474   - bool bad_status(uint32_t status)
475   - {
476   - return (
477   - status&(
478   - rx_data_status_codes::BAD_START_BIT|
479   - rx_data_status_codes::BAD_PARITY|
480   - rx_data_status_codes::BAD_STOP_BIT
481   - )
482   - );
483   - }
484   -
485   - bool bad_start_bit(uint32_t status)
486   - { return (status&rx_data_status_codes::BAD_START_BIT); }
487   -
488   - bool bad_parity(uint32_t status)
489   - { return (status&rx_data_status_codes::BAD_PARITY); }
490   -
491   - bool bad_stop_bit(uint32_t status)
492   - { return (status&rx_data_status_codes::BAD_STOP_BIT); }
493   -
494   - // NOTE: only the 5, 6, 7, 8 or 9 lowest significant bits
495   - // of data are send
496   - bool set_tx_data(uint32_t data);
497   -
498   - void flush()
499   - {
500   - // wait until sending everything
501   - while(tx_status!=tx_status_codes::IDLE)
502   - { /*nothing */ }
503   - }
504   -
505   - void flush_rx()
506   - {
507   - disable_tc_interrupts();
508   - rx_buffer.reset();
509   - enable_tc_interrupts();
510   - }
511   -
512   - tx_status_codes get_tx_status() { return tx_status; }
513   -
514   - uint32_t get_even_parity(uint32_t data,uint32_t bits)
515   - {
516   - uint32_t odd_parity=data&1;
517   - for(uint32_t bit=1; bit<bits; bit++)
518   - odd_parity=odd_parity^((data>>bit)&1);
519   - return odd_parity;
520   - }
521   -
522   - void enable_rx_interrupts() { NVIC_EnableIRQ(rx_irq); }
523   - void disable_rx_interrupts() { NVIC_DisableIRQ(rx_irq); }
524   -
525   - void config_tc_interrupt() { NVIC_SetPriority(timer_p->irq,0); }
526   -
527   - void enable_tc_interrupts() { NVIC_EnableIRQ(timer_p->irq); }
528   - void disable_tc_interrupts() { NVIC_DisableIRQ(timer_p->irq); }
529   -
530   - void start_tc_interrupts()
531   - {
532   - NVIC_ClearPendingIRQ(timer_p->irq);
533   - NVIC_EnableIRQ(timer_p->irq);
534   - TC_Start(timer_p->tc_p,timer_p->channel);
535   - }
536   -
537   - void stop_tc_interrupts()
538   - {
539   - NVIC_DisableIRQ(timer_p->irq);
540   - TC_Stop(timer_p->tc_p,timer_p->channel);
541   - }
542   -
543   - void enable_tc_ra_interrupt()
544   - {
545   - timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IER=
546   - TC_IER_CPAS;
547   - }
548   -
549   - bool is_enabled_ra_interrupt()
550   - {
551   - return (
552   - timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IMR &
553   - TC_IMR_CPAS
554   - );
555   - }
556   -
557   - void disable_tc_ra_interrupt()
558   - {
559   - timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IDR=
560   - TC_IDR_CPAS;
561   - }
562   -
563   - void enable_tc_rc_interrupt()
564   - {
565   - timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IER=
566   - TC_IER_CPCS;
567   - }
568   -
569   - bool is_enabled_rc_interrupt()
570   - {
571   - return (
572   - timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IMR &
573   - TC_IMR_CPCS
574   - );
575   - }
576   -
577   - void disable_tc_rc_interrupt()
578   - {
579   - timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IDR=
580   - TC_IDR_CPCS;
581   - }
582   -
583   - void get_incoming_bit()
584   - { rx_data |= (rx_bit<<rx_bit_counter); }
585   -
586   - void update_rx_data_buffer()
587   - {
588   - rx_data_status=(
589   - (rx_buffer.push(static_cast<uint32_t>(rx_data)))?
590   - rx_data_status_codes::DATA_AVAILABLE:
591   - rx_data_status_codes::DATA_LOST
592   - );
593   - }
594   -
595   - void set_outgoing_bit()
596   - {
597   - if((tx_data>>tx_bit_counter) & 1)
598   - PIO_Set(tx_pio_p,tx_mask);
599   - else PIO_Clear(tx_pio_p,tx_mask);
600   - }
601   -
602   - tc_timer_data* timer_p;
603   - uint32_t rx_pin;
604   - Pio* rx_pio_p;
605   - uint32_t rx_mask;
606   - IRQn_Type rx_irq;
607   -
608   - uint32_t tx_pin;
609   - Pio* tx_pio_p;
610   - uint32_t tx_mask;
611   -
612   - double tc_tick;
613   - double bit_time;
614   - double frame_time;
615   - uint32_t bit_ticks;
616   - uint32_t bit_1st_half;
617   -
618   - // serial protocol
619   - uint32_t bit_rate;
620   - data_bit_codes data_bits;
621   - parity_codes parity;
622   - stop_bit_codes stop_bits;
623   - uint32_t rx_frame_bits;
624   - uint32_t tx_frame_bits;
625   - uint32_t parity_bit_pos;
626   - uint32_t first_stop_bit_pos;
627   - uint32_t data_mask;
628   -
629   - // rx data
630   - circular_fifo<uint32_t,RX_BUFFER_LENGTH> rx_buffer;
631   - volatile uint32_t rx_data;
632   - volatile uint32_t rx_bit_counter;
633   - volatile uint32_t rx_bit;
634   - volatile rx_status_codes rx_status;
635   - volatile uint32_t rx_data_status;
636   -
637   - // tx data
638   - fifo<uint32_t,TX_BUFFER_LENGTH> tx_buffer;
639   - volatile uint32_t tx_data;
640   - volatile uint32_t tx_bit_counter;
641   - volatile tx_status_codes tx_status;
642   - };
  423 + struct _uart_ctx_
  424 + {
  425 +
  426 + return_codes config(
  427 + uint32_t the_rx_pin,
  428 + uint32_t the_tx_pin,
  429 + uint32_t the_bit_rate,
  430 + data_bit_codes the_data_bits,
  431 + parity_codes the_parity,
  432 + stop_bit_codes the_stop_bits
  433 + );
  434 +
  435 + void end()
  436 + {
  437 + flush();
  438 +
  439 + disable_tc_interrupts(); disable_rx_interrupts();
  440 +
  441 + stop_tc_interrupts(); detachInterrupt(rx_pin);
  442 +
  443 + pmc_disable_periph_clk(uint32_t(timer_p->irq));
  444 + }
  445 +
  446 + void tc_interrupt(uint32_t the_status);
  447 + void rx_interrupt();
  448 +
  449 + uint32_t get_rx_data(uint32_t& data);
  450 +
  451 + int available()
  452 + {
  453 + register int any;
  454 + disable_tc_interrupts();
  455 + any=rx_buffer.items();
  456 + enable_tc_interrupts();
  457 +
  458 + return any;
  459 + }
  460 +
  461 + bool data_available(uint32_t status)
  462 + {
  463 + return (
  464 + status&(
  465 + rx_data_status_codes::DATA_AVAILABLE|
  466 + rx_data_status_codes::DATA_LOST
  467 + )
  468 + );
  469 + }
  470 +
  471 + bool data_lost(uint32_t status)
  472 + { return (status&rx_data_status_codes::DATA_LOST); }
  473 +
  474 + bool bad_status(uint32_t status)
  475 + {
  476 + return (
  477 + status&(
  478 + rx_data_status_codes::BAD_START_BIT|
  479 + rx_data_status_codes::BAD_PARITY|
  480 + rx_data_status_codes::BAD_STOP_BIT
  481 + )
  482 + );
  483 + }
  484 +
  485 + bool bad_start_bit(uint32_t status)
  486 + { return (status&rx_data_status_codes::BAD_START_BIT); }
  487 +
  488 + bool bad_parity(uint32_t status)
  489 + { return (status&rx_data_status_codes::BAD_PARITY); }
  490 +
  491 + bool bad_stop_bit(uint32_t status)
  492 + { return (status&rx_data_status_codes::BAD_STOP_BIT); }
  493 +
  494 + // NOTE: only the 5, 6, 7, 8 or 9 lowest significant bits
  495 + // of data are send
  496 + bool set_tx_data(uint32_t data);
  497 +
  498 + void flush()
  499 + {
  500 + // wait until sending everything
  501 + while(tx_status!=tx_status_codes::IDLE)
  502 + { /*nothing */ }
  503 + }
  504 +
  505 + void flush_rx()
  506 + {
  507 + disable_tc_interrupts();
  508 + rx_buffer.reset();
  509 + enable_tc_interrupts();
  510 + }
  511 +
  512 + tx_status_codes get_tx_status() { return tx_status; }
  513 +
  514 + uint32_t get_even_parity(uint32_t data,uint32_t bits)
  515 + {
  516 + uint32_t odd_parity=data&1;
  517 + for(uint32_t bit=1; bit<bits; bit++)
  518 + odd_parity=odd_parity^((data>>bit)&1);
  519 + return odd_parity;
  520 + }
  521 +
  522 + void enable_rx_interrupts() { NVIC_EnableIRQ(rx_irq); }
  523 + void disable_rx_interrupts() { NVIC_DisableIRQ(rx_irq); }
  524 +
  525 + void config_tc_interrupt() { NVIC_SetPriority(timer_p->irq,0); }
  526 +
  527 + void enable_tc_interrupts() { NVIC_EnableIRQ(timer_p->irq); }
  528 + void disable_tc_interrupts() { NVIC_DisableIRQ(timer_p->irq); }
  529 +
  530 + void start_tc_interrupts()
  531 + {
  532 + NVIC_ClearPendingIRQ(timer_p->irq);
  533 + NVIC_EnableIRQ(timer_p->irq);
  534 + TC_Start(timer_p->tc_p,timer_p->channel);
  535 + }
  536 +
  537 + void stop_tc_interrupts()
  538 + {
  539 + NVIC_DisableIRQ(timer_p->irq);
  540 + TC_Stop(timer_p->tc_p,timer_p->channel);
  541 + }
  542 +
  543 + void enable_tc_ra_interrupt()
  544 + {
  545 + timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IER=
  546 + TC_IER_CPAS;
  547 + }
  548 +
  549 + bool is_enabled_ra_interrupt()
  550 + {
  551 + return (
  552 + timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IMR &
  553 + TC_IMR_CPAS
  554 + );
  555 + }
  556 +
  557 + void disable_tc_ra_interrupt()
  558 + {
  559 + timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IDR=
  560 + TC_IDR_CPAS;
  561 + }
  562 +
  563 + void enable_tc_rc_interrupt()
  564 + {
  565 + timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IER=
  566 + TC_IER_CPCS;
  567 + }
  568 +
  569 + bool is_enabled_rc_interrupt()
  570 + {
  571 + return (
  572 + timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IMR &
  573 + TC_IMR_CPCS
  574 + );
  575 + }
  576 +
  577 + void disable_tc_rc_interrupt()
  578 + {
  579 + timer_p->tc_p->TC_CHANNEL[timer_p->channel].TC_IDR=
  580 + TC_IDR_CPCS;
  581 + }
  582 +
  583 + void get_incoming_bit()
  584 + { rx_data |= (rx_bit<<rx_bit_counter); }
  585 +
  586 + void update_rx_data_buffer()
  587 + {
  588 + rx_data_status=(
  589 + (rx_buffer.push(static_cast<uint32_t>(rx_data)))?
  590 + rx_data_status_codes::DATA_AVAILABLE:
  591 + rx_data_status_codes::DATA_LOST
  592 + );
  593 + }
  594 +
  595 + void set_outgoing_bit()
  596 + {
  597 + if((tx_data>>tx_bit_counter) & 1)
  598 + PIO_Set(tx_pio_p,tx_mask);
  599 + else PIO_Clear(tx_pio_p,tx_mask);
  600 + }
  601 +
  602 + tc_timer_data* timer_p;
  603 + uint32_t rx_pin;
  604 + Pio* rx_pio_p;
  605 + uint32_t rx_mask;
  606 + IRQn_Type rx_irq;
  607 +
  608 + uint32_t tx_pin;
  609 + Pio* tx_pio_p;
  610 + uint32_t tx_mask;
  611 +
  612 + double tc_tick;
  613 + double bit_time;
  614 + double frame_time;
  615 + uint32_t bit_ticks;
  616 + uint32_t bit_1st_half;
  617 +
  618 + // serial protocol
  619 + uint32_t bit_rate;
  620 + data_bit_codes data_bits;
  621 + parity_codes parity;
  622 + stop_bit_codes stop_bits;
  623 + uint32_t rx_frame_bits;
  624 + uint32_t tx_frame_bits;
  625 + uint32_t parity_bit_pos;
  626 + uint32_t first_stop_bit_pos;
  627 + uint32_t data_mask;
  628 +
  629 + // rx data
  630 + circular_fifo<uint32_t,RX_BUFFER_LENGTH> rx_buffer;
  631 + volatile uint32_t rx_data;
  632 + volatile uint32_t rx_bit_counter;
  633 + volatile uint32_t rx_bit;
  634 + volatile rx_status_codes rx_status;
  635 + volatile uint32_t rx_data_status;
  636 +
  637 + // tx data
  638 + fifo<uint32_t,TX_BUFFER_LENGTH> tx_buffer;
  639 + volatile uint32_t tx_data;
  640 + volatile uint32_t tx_bit_counter;
  641 + volatile tx_status_codes tx_status;
  642 + };
643 643  
644 644 static _uart_ctx_ _ctx_;
645 645  
646   - mode_codes _mode_;
  646 + mode_codes _mode_;
647 647 };
648 648  
649 649 template<
... ... @@ -654,159 +654,159 @@ namespace arduino_due
654 654 {
655 655 public:
656 656  
657   - typedef uart<TIMER,RX_BUFFER_LENGTH,TX_BUFFER_LENGTH> raw_uart;
  657 + typedef uart<TIMER,RX_BUFFER_LENGTH,TX_BUFFER_LENGTH> raw_uart;
658 658  
659   - serial()
660   - {
661   - _peek_data_valid_=false;
662   - _last_data_status_=rx_data_status_codes::NO_DATA_AVAILABLE;
663   - }
  659 + serial()
  660 + {
  661 + _peek_data_valid_=false;
  662 + _last_data_status_=rx_data_status_codes::NO_DATA_AVAILABLE;
  663 + }
664 664  
665   - serial(const serial&) = delete;
666   - serial(serial&&) = delete;
667   - serial& operator=(const serial&) = delete;
668   - serial& operator=(serial&&) = delete;
669   -
670   - void begin(unsigned long baud_rate)
671   - {
672   - _tc_uart_.config(
673   - default_pins::DEFAULT_RX_PIN,
674   - default_pins::DEFAULT_TX_PIN,
675   - static_cast<uint32_t>(baud_rate),
676   - data_bit_codes::EIGHT_BITS,
677   - parity_codes::NO_PARITY,
678   - stop_bit_codes::ONE_STOP_BIT
679   - );
680   - }
681   -
682   - void begin(
683   - uint32_t rx_pin = default_pins::DEFAULT_RX_PIN,
684   - uint32_t tx_pin = default_pins::DEFAULT_TX_PIN,
685   - uint32_t bit_rate = bit_rates::DEFAULT_BIT_RATE,
686   - data_bit_codes the_data_bits = data_bit_codes::EIGHT_BITS,
687   - parity_codes the_parity = parity_codes::NO_PARITY,
688   - stop_bit_codes the_stop_bits = stop_bit_codes::ONE_STOP_BIT
689   - )
690   - {
691   - _tc_uart_.config(
692   - rx_pin,
693   - tx_pin,
694   - bit_rate,
695   - the_data_bits,
696   - the_parity,
697   - the_stop_bits
698   - );
699   - }
700   -
701   - // NOTE: on function half_duplex_begin() the last function
702   - // argument specifies the operation mode: true (RX_MODE,
703   - // reception mode, the default) or false (TX_MODE, trans-
704   - // mission mode)
705   - return_codes half_duplex_begin(
706   - uint32_t rx_tx_pin = default_pins::DEFAULT_RX_PIN,
707   - uint32_t bit_rate = bit_rates::DEFAULT_BIT_RATE,
708   - data_bit_codes the_data_bits = data_bit_codes::EIGHT_BITS,
709   - parity_codes the_parity = parity_codes::NO_PARITY,
710   - stop_bit_codes the_stop_bits = stop_bit_codes::ONE_STOP_BIT,
711   - bool in_rx_mode = true
712   - )
713   - {
714   - return _tc_uart_.half_duplex_config(
715   - rx_tx_pin,
716   - bit_rate,
717   - the_data_bits,
718   - the_parity,
719   - the_stop_bits,
720   - in_rx_mode
721   - );
722   - }
723   -
724   - void end() { _tc_uart_.end(); }
725   -
726   - int available(void) { return _tc_uart_.available(); }
727   -
728